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| 3VD037060NEJL 3VD037060NEJL STRUCTURE DESCRIPTION 3VD037060NEJL is a N-Channel enhancement mode MOS-FET chip fabricated in advanced silicon epitaxial planar technology. Zener diode ESD protected up to 500V (HBM). High density cell design for low RDS (ON). Rugged and reliable. Fast switching performance. High saturation current capability. The chips may be packaged in SOT-23 type . The packaged product is widely used in the small servo motor control, power MOS-FET gate drivers, and other switching applications. Die size: 0.37mm*0.37mm. Chip Thickness: 23020m. Top metal: Al, Backside Metal: Au. EQUIVALENT CIRCUIT CHIP TOPOGRAPHY N-CH MOSFET CHIPS WITH ESD PROTECTED ABSOLUTE MAXIMUM RATINGS (Tamb=25C) Parameter Drain-Source Voltage Gate-Source Voltage Drain Current Drain Current --Plused * Power Dissipation (SOT-23) Operation Junction Temperature Storage Temperature Symbol VDS VGS ID IDM PD TJ Tstg Ratings 60 20 100 600 200 150 -55-150 Unit V V mA mA mW C C Note:* Repetitive rating: pulse width limited by maximum junction temperature. ELECTRICAL CHARACTERISTICS (Tamb=25C) Parameter Drain-Source Breakdown Voltage Gate-Threshold Voltage* Gate-body Leakage Zero Gate Voltage Drain Current Drain-Source On-Resistance * Symbol V(BR)DSS Vth(GS) lGSS IDSS RDS(on) Test conditions VGS=0V, ID=10A VDS= VGS, ID=250A VDS=0V, VGS =20V VDS=60V, VGS =0V VGS=5.0V, ID=100mA VGS=10V, ID=100mA Min. 60 1.2 Typ. 4 3 Max. 2.0 5 1 6 5 Unit V V A A HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn REV:1.1 2008.10.15 Page 1 of 1 |
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